抄録
A compensation technique for time alignment of envelope and phase paths in an envelope delta-sigma modulator (EDSM) is proposed. In this technique, two controllable delays are intentionally added, and a combination of the two delays compensates a time misalignment caused by the inherent processing delay of a delta-sigma modulator (DSM) and the difference of propagation delays on the asymmetric envelope and phase paths. One of the two delays is a digital sample delay, which is added in the digital domain before a digital-to-analog converter (DAC). The other delay is obtained by the use of D flip flops (DFFs) followed by a DSM, which is possible because the output of a DSM is changed by a clock. The validity of the proposed technique is confirmed by simulation.
