抄録
Resistive random access memory (ReRAM) has been considered as a promising non-volatile storage technology of next generation especially for embedded application. However, for conventional write scheme with fixed duration and amplitude, power consumption is very high and cell performance degrades due to over-programming. In this paper, we proposed a self-adaptive write driver with fast termination of ramped-up pulse (FT-RPSWD) after write success. The slope detection and feedback mechanism are used to monitor the switching point of cell resistance. The scheme is insensitive to the selection of reference voltage, which is beneficial to ensure write margin even if the resistance variation among cells is severe. The proposed technique is verified on a 256Kb ReRAM test macro fabricated based on 0.13-µm logic process. The mean value of endurance distribution is improved by 3 orders of magnitude from 102 to 105 and the set and reset energy per bit are reduced significantly.
