Systematic experimental study on stitching techniques of CMOS Image Sensors

Jun Zhu; Donghua Liu; Wei Zhang; Qing Wang; Wenliang Li; Lijun Chen; Chen Li; Yuhang Zhao

doi:10.1587/elex.13.20160441

This article has now been updated. Please use the final version.

Systematic experimental study on stitching techniques of CMOS Image Sensors

Jun Zhu, Donghua Liu, Wei Zhang, Qing Wang, Wenliang Li, Lijun Chen, Chen Li, Yuhang Zhao

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Keywords: CMOS Imaging Sensor (CIS), stitching technique, 12 inch, 0.055μm CMOS process

JOURNAL FREE ACCESS Advance online publication

Article ID: 13.20160441

DOI https://doi.org/10.1587/elex.13.20160441

The final version of this article is now available: Vol. 13 (2016), No. 15 pp. 20160441-20160441

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Abstract

On the basis of the systematic study of stitching techniques, a large area, 28.3mm × 38.8mm, 42 Mega pixels CMOS Imaging Sensor (CIS) had been demonstrated on 12 inch silicon wafer in a 0.055μm CMOS process. By scanning a reticle across a wafer of silicon, smaller arrays can be stitched together to construct larger area sensors. Meanwhile, in order to verify the feasibility and capability of stitching, a 203mm × 179mm, 1.8 Billion pixels CIS was also created without any performance deficiency.

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