A Burst-mode Clock and Data Recovery Circuit with Two Symmetric Quadrature VCO's

Bum-Hee Choi; Kyung-Sub Son; Taek-Joon An; Jin-Ku Kang

doi:10.1587/elex.13.20161086

This article has now been updated. Please use the final version.

A Burst-mode Clock and Data Recovery Circuit with Two Symmetric Quadrature VCO's

Bum-Hee Choi, Kyung-Sub Son, Taek-Joon An, Jin-Ku Kang

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Keywords: Burst-mode clock recovery, Quadrature phase VCO, instantaneous phase locking, passive optical network (PON)

JOURNAL FREE ACCESS Advance online publication

Article ID: 13.20161086

DOI https://doi.org/10.1587/elex.13.20161086

The final version of this article is now available: Vol. 13 (2016), No. 24 pp. 20161086-20161086

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Abstract

This paper presents a burst-mode clock and data recovery (CDR) circuit based on two symmetric quadrature phase VCO’s. The reduced loop locking time of less than 5 bits was achieved without any extrta delay circuits which are added in conventional schemes for timing control. The proposed circuit is designed in 350nm CMOS process and its feasibility has been proved successfully operating at 1.25Gb/s.

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