Jingbo Zhang1) 2),
1) School of Electronics and Information Engineering, Anhui University
2) Industry Development and Promotion Center, Ministry of Industry and Information Technology of the Peoples Republic China
radiation-hardened SRAM, single event upset, single-event multiple-node upsets, static noise margin, lower power consumption
The final version of this article with its full bibliographical information is available. To access the article, click here (Vol. 14 (2017), No. 18 pp. 20170784-20170784).
This paper intends to present a novel radiation-hardened SRAM cell by using the PMOS transistors stacked (each PMOS is split into two same sizes) and changing the inner topological structure on basis of the Quatro-10T. Combined with layout-level optimization design, the 3-D TCAD mixed-mode simulation results show that the novel design has a great single event upset (SEU) immune. Simultaneously, it is found to be tolerant of partial single-event multiple-node upsets (SEMNUs) due to the charge sharing among off-PMOS transistors. In addition, compared with the Quatro-10T, our proposed structure exhibits larger static noise margin (SNM) as well as lower power consumption in 65nm COMS technology.
Edited and published by : The Institute of Electronics, Information and Communication Engineers Produced and listed by : Komiyama Printing Co., LTD.