A low power QRS detection processor with adaptive scaling of processing resolution

抄録

This work presents a power efficient QRS detection processor with self-adjustable processing resolution. As reducing the resolution of electrocardiogram (ECG) data in certain degree has little effect on the detection accuracy but helps cut down the calculation power, a total of eight processing resolutions are supported in the processor, which can bring different levels of dynamic power reduction. The processing resolution is scaled adaptively based on the QRS detection result to achieve optimized energy efficiency and guarantee acceptable detection performance. The processor is implemented in SMIC 40nm CMOS technology and has a total area of 5655um². When tested on MIT-BIH arrhythmia database with 50MHz operating frequency and 0.9V voltage supply, its power consumption is 77.7uW, which is reduced by 27.4% compared to the original processor, while the area is only increased by 6.7%. And it also achieves relatively high detection result, with an average sensitivity of 98.63% and positive prediction of 98.86%.