Countermeasure against Fault sensitivity analysis based on Clock Check Block

抄録

Fault sensitivity analysis (FSA), as a new type of fault attacks, has been proved a serious threat to the security of cryptographic circuits. It exploits the fault clock to obtain fault sensitivity so as to recover the secret keys. According to the characteristics of FSA, this letter proposes a countermeasure to thwart FSA. We first design a clock check block (CCB) to detect the fault clock which is necessary for carrying on FSA, and then design an enable signal module to change the output of the cryptographic circuit once there is any clock glitch be detected. The implementation results show the proposed CCB can detect the abnormal clock successfully, and our countermeasure can effectively resist FSA. This letter also investigates the hardware overhead of the proposed countermeasure. Compared with these existing countermeasures, although our countermeasure consumes a little more hardware resources due to the extra 495 gates, it has better versatility.