IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

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A Design of Source-Degenerated CMOS Active Negative Group Delay Circuit Using Bonding Wire
Girdhari ChaudharyJunhyung JeongQi WangYongchae Jeong
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論文ID: 16.20190010

この記事には本公開記事があります。
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This paper presents a design of CMOS source-degenerated active negative group delay (NGD) circuit by using bonding wire for a compact circuit size. The proposed circuit consists of two-stage cascade MOSFETs where parallel RLC resonator circuits are connected to the source of the MOSFETs. To reduce the size, the parallel RLC resonators are implemented with bonding wires and pads. For experimental verification, two-stage NGD circuits with slightly different center frequencies were designed. The measurement results show that the NGD bandwidth, group delay, and gain are 100 MHz, -2.5 ns, and 3 dB, respectively. The measured input/output return losses are higher than 8 dB and 14 dB, respectively, at the center frequency of 1.88 GHz.

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© 2019 by The Institute of Electronics, Information and Communication Engineers
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