RoR: A Low Insertion Loss Design of Rearrangeable Hybrid Photonic-Plasmonic 6x6 Non-Blocking Router for ONoCs

抄録

Optical networks on chip (ONoC) delivers a promising alternative to meet growing needs of higher bandwidth and low power consumption in manycore processors. Optical routers are the key element in ONoCs that significantly affect the performance of overall network. In this letter, we propose a rearrangeable non-blocking 6x6 router (RoR) constructed with 2x2 hybrid photonic-plasmonic switching (HPPS) elements. Router architectures with 15 HPPS elements and an optimized design using reduced HPPS elements are presented and analyzed. In optimized form, proposed design consumes only 12 HPPS elements which results in low insertion loss and crosstalk noise in comparison to the un-optimized architecture. We observe up to 50% reduction in switching elements count in comparison to other router architecture of same radix.