A design method of CPR for wide voltage design

Abstract

In this paper, we proposed an improved design method of critical path replica (CPR) for wide voltage design. Timing accuracy of CPR in wide operating voltage is improved by applying load matching and transistor-level static timing analysis (TSTA). We applied proposed method to 100 critical paths of iscas’95 benchmark circuits, the results of simulation experiments in SMIC 55nm shows that the CPR designed by proposed method can operating between 0.3V-1.2V with only 0.25% delay error (DE).