A low-loss high-linearity SOI SP6T antenna switch using diode biasing method

抄録

This letter describes a single-pole six-throw (SP6T) antenna switch in a 180nm silicon-on-insulator (SOI) CMOS technology for receive diversity and LTE transmit/receive applications. Using a new diode biasing method, the conventional biasing resistor and supply voltage are removed at the body of the stacked-FET switch, a diode is used to connect the body and gate for body bias instead. The biasing diode turns off and on and functions as a high and small resistor for the on and off state. The proposed design helps to achieve low loss and high linearity. The measured insertion loss (IL) at 0.9 and 1.9GHz are roughly 0.29 and 0.46dB, respectively. The switch shows a second harmonic of -86 and -83dBc, and third harmonic power of -94 and -87dBc with a +26dBm input power at 0.9 and 1.9GHz, respectively.