Article ID: 16.20190601
A simple eye-opening monitor (EOM) system based on two dimensional (2-D) counter-value profile is designed. The proposed EOM can be applied to adaptive equalizer coefficient control for better bit error rate (BER) performance in the high-speed serial interface. Input data is sampled 2048 times with 32 different clock phases on 32 different decision threshold amplitudes to the clocked comparator and the sampled outputs of ‘1’ or ‘0’ are recorded in the designated counter. The counter values at each phase and decision threshold amplitude are compared with a reference of 1024 for eye-opening monitor. The estimated eye-diagram is displayed on the monitor. Through the estimated eye-diagram, the optimal sampling timing can also be determined. The chip for sampling data and gathering the counter value has been designed through 180-nm CMOS process and 86 mW including I/O block is consumed on 2 Gb/s data rate.
