Real-time detection of hardware trojan attacks on General-Purpose Registers in a RISC-V processor

抄録

Hardware trojans(HT) is one of the main threats for hardware security, especially attacks on General-Purpose Registers(GPRs) of processors. This paper presented a novel method to detect HT induced attacks by comparing the states of GPRs with an embedded reference model in real time. Firstly, the instruction sequence was realigned with four principles. Secondly, based on the realigned instruction stream, a reference model for GPRs was built. Finally, HT induced attacks on GPRs can be detected by comparing the expected GPRs’ state from the reference model with the sampled GPRs’ state from processors. We integrated this method into a RISC-V core of PULpino and investigated the feasibility with different programs. The experimental results showed that all the randomly inserted HT attacks can be detected in real time with the latency of two clock cycles.