IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

This article has now been updated. Please use the final version.

A 30 Gbps 1.25 pJ/b CMOS Receiver Analog Front-end with Low Supply Voltage
Zhou GaoleiMao LuhongXie shengMin Chuang
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JOURNAL FREE ACCESS Advance online publication

Article ID: 18.20210114

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Abstract

In this paper, a 30 Gbps 1.25 pJ/b optical receiver analog front-end (Rx_AFE) mainly consisting of an active voltage-current feedback transimpedance amplifier (AVCF-TIA) and a staggered active feedback limiting amplifier (LA) is presented. By adopting active voltage-current feedback technique in the proposed TIA, the large input capacitance is well-isolated without the limitation of low supply voltage, and the direct contradiction between transimpedance gain and output pole frequency is alleviated significantly. Meanwhile, the bandwidth is further extended by adopting staggered active feedback technique in the LA designing. Fabricated in a 40 nm bulk-CMOS technology, the presented Rx_AFE exhibits a transimpedance gain of 63.8 dBΩ and a 3-dB bandwidth of 24.3 GHz. From supply voltage of 1.0 V, power dissipation and power efficiency of the circuit are 37.5 mW and 1.25 pJ/b respectively, when 30 Gbps PRBS is operated. The core circuit occupies a chip area of 920 µm × 690 µm.

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