Article ID: 19.20220415
Owing to the large area and power consumption of traditional physically unclonable function (PUF)circuits, they are susceptible to interference from environmental factors. A compact PUF circuit design scheme is proposed by analyzing the circuit structure and sub-threshold leakage current deviation characteristics of a bistable PUF. First, the current-voltage sensitive characteristics of a transistor in the sub-threshold operating region are utilized. Next, to improve the output response speed and the uniqueness of the characteristic information of the PUF circuit, the proposed PUF circuit is designed which combines with the positive feedback and RS latch characteristics. Finally, simulation results based on the TSMC 65 nm CMOS process show that the PUF has good uniqueness, randomness, and reliability. The cell layout area, the bit error rate (BER) in the worst case, and the energy consumption are 0.177 μm2, 2.8%, and 8.976 fJ/bit respectively.
