A random shifting data weighted averaging algorithm for Nyquist -rate DAC

Abstract

This paper proposes a random shifting data weighted averaging (RSDWA) algorithm where a bidirectional circular shift register is co-worked with a pseudo-random sequencer to form a random module, which makes mismatch error suppressed in the frequency domain, therefore it can achieve a higher Spurious Free Dynamic Range (SFDR) compared with the traditional DWA. To verify the proposed algorithm, a 6-bit Nyquist-rate resistor ladder DAC is designed based on 180nm CMOS process. The simulation results show that the proposed RSDWA can increase SFDR by 7.3dBc and decrease the Integral Non-Linearity (INL) from 0.75LSB to 0.37LSB compared with the traditional DWA algorithm.