Design of wide input voltage range and low quiescent current LDO

Abstract

This paper presents a low-dropout linear regulator (LDO) with ultra-low quiescent current in high-voltage environments. A high-voltage pre-regulation module is employed to provide stable low-voltage output, reducing the use of high-voltage transistors. The integration of error amplifiers and reference circuits effectively reduces quiescent current while reducing chip area. Load detection function is used to reduce the quiescent current of the over temperature protection circuit under no-load conditions. Stability within the full load range is achieved through zero-pole tracking compensation and pseudo-ESR compensation techniques. LDO is fabricated using 0.35 μm BCD high-voltage technology and can stably output 5 V when the input voltage is in the range of 5.5-24 V. The quiescent current at 24 V input is 960 nA, and it can drive a maximum load of 150 mA. The overshoot voltage is less than 61 mV during load variations within 100 mA.