The structure improvement of SiC IGBT for anti-latch-up capability

Abstract

The parasitic thyristors inside the SiC IGBT are accidentally turned on, resulting in a sharp increase in the anode current. The continuous high current and out-of-control state may cause permanent damage to the SiC IGBT device, affecting the stability and safety of the entire circuit. In this paper, the static latch-up effect of SiC IGBT is deeply studied based on the Sentaurus TCAD simulation platform. By adjusting the key parameters such as drift region thickness and buffer thickness, the influence of different structural parameters on the latch-up effect of SiC IGBT is analyzed. Three structures of SiC IGBT including N+ emitter ballast resistance, shallow P+ injection, and deep P+ injection are simulated to suppress the latch-up effect. The simulation results show that these three structures can suppress the latch-up effect of SiC IGBT to a certain extent. Among them, the structure with deep P+ injection has a stronger anti-latch-up ability and larger anti-latch-up threshold, and the on-state voltage drop of the control device is unchanged while the turn-off loss is reduced. The structure of deep P+ injection provides a certain reference for improving the performance and reliability of SiC IGBT.