A novel on-chip digital soft-start circuit

抄録

In this paper, a novel on-chip digital soft-start circuit is proposed to realize the suppression of inrush current and overshoot voltage in the startup phase of the system based on the idea of intermittent charging of an on-chip capacitor. The circuit was simulated and implemented using the 0.18 μm BCD process. Simulation and test findings reveal that the soft-start time is 2 ms, the layout area occupied by the circuit is 0.018 mm², the soft-start circuit can suppress peak inrush current by up to 87.3%, reducing the inrush current to below 634 mA, and there is no overshoot in the output voltage. The proposed architecture does not consume system power and is fully integrated on the same chip without any external components, which effectively reduces the die size and the cost.