Article ID: 22.20250110
This brief presents a power-efficient PAM-4 transmitter. The proposed hybrid voltage-mode current-mode (VM-CM) driver with push-pull current-mode equalization reduces the power consumption. The date-dependent jitter (DDJ) suppressed C2MOS MUX is devised to reduce the output jitter and power of prior widely used C2MOS MUX. The phase aligner is utilized to provide sufficient time margin for the high-speed 4-1 MUX, thus no power-hungry high-speed latches along with its clock buffer are required for retiming. Fabricated in 40-nm CMOS, our prototype can operate at 56 Gb/s data rate with 0.7 pJ/bit energy efficiency and 6.1 dB channel loss at Nyquist frequency of 14 GHz, namely achieving a figure-of-merit (FOM) of 0.11 pJ/bit/dB.