IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Multi-Path Optimization for Cost Aggregation in Semi-Global Matching and Its Hardware Implementation with 53% Memory Reduction
Haiwei WangLeilei HuangChunqi ShiJinghong ChenRunxi Zhang
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JOURNAL FREE ACCESS Advance online publication

Article ID: 22.20250186

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Abstract

Cost aggregation is a crucial step in the accurate stereo depth estimation process known as semi-global matching. However, this step is challenged by storing large amounts of aggregated data, which is necessary to achieve high matching accuracy under large resolution and large disparity conditions. In this paper, we propose a multi-path optimization aggregation strategy and re-select the complementary combinations of key paths in the forward and backward scanning directions to improve the matching accuracy as much as possible. An error rate of only 5.21% is achieved on the KITTI 2015 dataset. Next, we propose DCT-based truncated compression and selective storage to alleviate the problem of memory increase due to the introduction of reverse critical aggregation paths. Experiments show that the matching error rate increases by only 0.6% on the KITTI 2015 dataset with 53% memory savings. Finally, 1920 × 1080 @62fps @128MHz is achieved on ZCU102 FPGA.

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© 2025 by The Institute of Electronics, Information and Communication Engineers
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