A Prediction Method for Gate Degradation of SiC MOSFETs Based on On-State Resistance Variation

Abstract

Gate oxide degradation plays a critical role in the reliability of SiC MOSFETs. This paper proposes a method for predicting SiC MOSFET gate degradation based on on-state resistance variation (ΔR_ON). ΔR_ON, which is induced by gate voltage changes, strongly correlates with gate degradation. The relationship between ΔR_ON and gate degradation is derived through theoretical analysis and validated through testing at different temperatures. During prediction, a gate drive circuit induces gate voltage transients, and both I_DS and V_DS before and after the transients are measured to calculate ΔR_ON. An iterative method is used to find the solution that best matches the calibrated relationship. Experimental results demonstrate the method’s effectiveness in accurately predicting gate degradation across various temperatures and degradation levels.