A 2×32-Gb/s, 128-Gb/s/mm Distributed Single-Ended Transimpedance Amplifier in 28-nm CMOS

Haoran Yin; Sikai Chen; Bolun Cui; Guike Li; Jian Liu; Nanjian Wu; Shuangming Yu; Nan Qi; Liyuan Liu

doi:10.1587/elex.23.20260239

Haoran Yin, Sikai Chen, Bolun Cui, Guike Li, Jian Liu, Nanjian Wu, Shuangming Yu, Nan Qi, Liyuan Liu

Author information

Haoran Yin
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Sikai Chen
Lanzhou University
Bolun Cui
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Guike Li
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Jian Liu
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Nanjian Wu
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Shuangming Yu
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Nan Qi
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences
Liyuan Liu
State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Chinese Academy of Sciences
Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences

Keywords: distributed amplifier, optical receiver, transimpedance amplifier (TIA), wavelength-division multiplexing (WDM), bandwidth density

JOURNAL FREE ACCESS Advance online publication

Article ID: 23.20260239

DOI https://doi.org/10.1587/elex.23.20260239

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Abstract

This paper presents a 2 × 32 Gb/s 128-Gb/s/mm single-ended distributed transimpedance amplifier fabricated in a 28-nm CMOS processing technology. To address the area-bandwidth trade-off inherent in conventional distributed amplifiers, a distributed biasing scheme is proposed to eliminate large passive terminations and their associated layout overhead. In addition, a dual m-derived inductor-peaking technique is introduced to extend the bandwidth without channel width penalty. The prototype achieves a per-channel data rate of 32-Gb/s, a 3-dB bandwidth of 24 GHz, a transimpedance gain of 42.9 dBΩ, and an edge bandwidth density of 128 Gb/s/mm.

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