Article ID: 23.20260366
We present an experimental demonstration of factoring 21 using a compiled version of Shor’s algorithm on the Tianyan-176 superconducting processor. Our compilation approach—Fredkin gate synthesis—is primarily derived from the symmetry of the permutation operations in the modular exponentiation function (MEF) modules. The effectiveness of the approximate Toffoli gate substitution is also theoretically validated. Additionally, we propose several novel compilation strategies for implementing a lower-depth, topology-adapted inverse quantum Fourier transform (QFT). The 6-qubit demonstration achieves a state-of-the-art implementation with only 19 two-qubit gates on a grid-based qubit topology, without introducing any SWAP gates. Owing to the permutation symmetry, the demonstration is readily extensible to larger-scale instances and other factoring cases by introducing only a minimal number of SWAP gates, leveraging the commutation properties between the controlled MEF and inverse QFT modules.
