電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電子物性・デバイス>
次世代ボルテージレギュレータ向け低損失システムインパッケージ
橋本 貴之川島 徹也白石 正樹秋山 登宇野 友影松浦 伸悌
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2010 年 130 巻 9 号 p. 1630-1635

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This paper presents Cu-plate-bonded and capacitor-mounted SiPs for voltage regulators. The Cu-plate-bonded SiP reduces the power loss by 23% compared to those of a SiP with wire bonding. Copper plates reduce the spreading resistance of the topside electrodes in the MOSFETs, leading to lower power loss. The parasitic inductance of the capacitor-mounted SiP is reduced to 56% of that of the SiPs having the input capacitor mounted on the PCB. This reduction is due to the short current loop from the input capacitor to the MOSFETs. As a result, the power loss can be reduced by 20% for the same spike voltage. The high-side MOSFET die is flipped so that the drain electrode faces up, facilitating the connection of the drain electrode of the high-side MOSFET and the source electrode of the low-side MOSFET to the mounted input capacitor.
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© 電気学会 2010
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