An Efficient IEEE-Compliant 8×8 Inv-DCT Architecture with 24 Adders

抄録

A cost-effective architecture to compute the Inverse Discrete Cosine Transform (IDCT) is presented. It uses a new 2-D algebraic integer encoding that maps the transform basis coefficients with integers that results in considerable savings in hardware cost. Only 24 adders are required to perform the 8-point 1-D IDCT operation. Simulation results show that the proposed scheme is compliant to IEEE-1180 standard in terms of accuracy requirements.