電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電気回路・電子回路>
2トランジスタ型メモリセルを用いた積層方式NAND構造FeRAMの設計法
菅野 孝一渡辺 重佳
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2011 年 131 巻 7 号 p. 1327-1336

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Design method of stacked NAND type FeRAM with 2-transistor type memory cell has been newly proposed. With newly introduced WL voltage generator which enables to compensate drain current variation caused by mis-alignment of the ferro-electric film removal mask 4F2 small cell size has been successfully realized. 32 stage of stacked NAND type FeRAM is a promising candidate for realizing high reliability compared with the conventional stacked NAND type 1-transistor FeRAM.

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© 電気学会 2011
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