オフチップ共振回路を用いた断熱的論理用低消費電力電源回路

抄録

This paper presents a low-power sinusoidal supply circuit for our proposed adiabatic logic (2PC2AL). The proposed supply circuit consists of three parts: LC resonant circuit, voltage generator circuit, and peak controll circuit. The proposed circuit is simulated using an 0.18 μm CMOS technology. The simulation results are shown that the power dissipation of proposed voltage generator has 10.8 μW at 100 nA load, and the proposed sinusoidal supply circuit has 35.5 μW at 100 kHz. The power dissipation of the adiabatic/non-adiabatic 16bit MPU decoder are also compared. At transition frequency 10 k to 1 MHz, the proposed decoder with a sinusoidal supply circuit shows a maximum of 75% reduction in power dissipation to that of a static CMOS.