リープフログシミュレーションによる有極形低域・帯域通過フィルタの能動素子数削減法

抄録

The leapfrog simulation of doubly-terminated LC-ladder circuits is one of the methods to realize analog integrated filter circuits with low parameter sensitivity. However, this method has a drawback that the simulated circuits for higher-order filters with transmission zeros requires a large number of active elements which consume large chip area and power dissipation. This paper proposes an signal addition circuit which can be used as a building block for the simulated circuit with a lower number of the active elements and shows the feasibility by using an implementation example of a 10th-order band-pass filter with transmission zeros.