低容量化パルス形カオスニューロンモデル

抄録

In recent years, a number of studies of neural networks have been conducted with the purpose of applying engineering to the brain. Previously, we proposed a pulse-type hardware neuron model, which can make an integrated circuit with field effect transistors and capacitors. However, the proposed model needed capacitors of [pF] order.

In this paper, we propose the constitution of the low capacitor implementation model. As a result, it is shown that the proposed model is able to achieve chaotic oscillation using 1fF capacitors.