電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電気回路・電子回路>
Stochastic TDC Architecture with Self-Calibration and its RTL Verification
Congbing LiJunshan WangHaruo KobayashiRyoji Shiota
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ジャーナル 認証あり

2017 年 137 巻 2 号 p. 335-341

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A time-to-digital converter (TDC) based on stochastic process and statistics theory is presented. This architecture utilizes the stochastic variation in CMOS process positively for fine time resolution. It needs a large number of flip-flops for statistics but advanced fine CMOS technology can realize it. The self-calibration technique using the histogram method is applied to compensate the nonlinearity due to the circuit characteristics variation as well as timing skew by layout and routing. The proposed TDC can be implemented with full digital circuit, which is suitable as nano-CMOS mixed-signal circuit. Register-Transfer-Level (RTL) simulation is conducted to validate the operation principle. RTL verification results indicate that the proposed stochastic architecture with self-calibration feature can realize a linear TDC with sub-picosecond time resolution.

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© 2017 by the Institute of Electrical Engineers of Japan
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