2018 年 138 巻 7 号 p. 774-782
The transmission of waveforms through optical fiber usually results in some waveform distortion. To smoothen this distortion, digital finite-impulse response (FIR) filters are commonly employed. Digital FIR filters require a relatively large area for digital signal processing (DSP) on IC chip, so an analog FIR filter is adopted. According to past researches, it is possible to realize a small area circuit by using a CMOS inverter as a delay circuit. However, number of delay circuits employing CMOS inverter increases N/2 for Multi-Level optical transmission. Therefore, we propose a new multiplier and attempted to reduce the circuit area of 4 PAM analog FIR filter. According to the estimation using SPICE simulation, it can be expected to reduce the area by 25% by using the proposed configuration.
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