Experimental Verification of 2-Degree-of-Freedom Deadbeat Control with Disturbance Compensation for PMSM Drive System Using FPGA

抄録

This paper presents a new control system for permanent magnet synchronous motors composed of a 2-degree-of-freedom deadbeat control with a disturbance compensation method using a field-programmable gate array (FPGA). The purpose is to achieve quick response and improve the tracking accuracy of motor current and the robustness against parameter variations. The proposed control system using a FPGA based the hardware controller with simple implementation can compute all calculation process within the dead time of an inverter, realizing ideal real time feedback control without sample delay. The performance of the proposed control strategy was verified in comparison with the conventional deadbeat control method through simulations and experimental results.