2018 年 138 巻 12 号 p. 533-538
TSV (Through-Silicon Via) is a technology, which realizes an electrical connection from the surface to the backside of the silicon (Si) substrate, offering advantages of device minimization for bioprobe applications. To realize the TSV, copper (Cu) has widely been used as the via material. However, Cu cannot be used for a high temperature process (e.g., 700°C for Si growth process). To realize TSVs for high temperature processes, here we propose a poly-Si-based ‘two-step TSV', which consists of different hole sizes at the surface and bottom of the Si substrate. By utilizing deep reactive-ion etching (RIE), a 50-µm-diameter and 240-µm-depth hole was formed on the backside of the substrate, while a 12-µm-diameter and 10-µm-depth one was formed on the surface side of the substrate with the same alignment. The TSV is then filled with heavily-doped poly-Si, which is simultaneously deposited in the process of Si2H6 gas-based vapor-liquid-solid (VLS) growth of Si-microneedles. The current-voltage characteristics of the fabricated TSV show a linear behavior with a resistance of 6 kΩ, confirming the feasibility of the proposed TSV.
J-STAGEがリニューアルされました! https://www.jstage.jst.go.jp/browse/-char/ja/