電気関係学会九州支部連合大会講演論文集
平成25年度電気関係学会九州支部連合大会(第66回連合大会)講演論文集
セッションID: 02-1P-09
会議情報

ボディ効果とスイッチトキャパシタ技術に基づくCMOSの低電圧リファレンス
*Lin YudongZhang Hao吉原 務
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抄録
A low power CMOS voltage reference using body effect and switched-capacitor technique is introduced. The output voltage is generated by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor, only one transistor is required to generate the reference voltage. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.74 mV, and the T.C. is 50.0 ppm/°C ranging from -40°C to 80°C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.
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