Performance Degradation Due to Drain-Induced Barrier Lowering in Ultra-Low Supply Voltage CMOS Circuits Operating in Subthreshold Region

The 74th JSAP Autumn Meeting 2013

セッションID: 19a-C8-10

会議情報

主催: The Japan Society of Applied Physics

会議名: 応用物理学会秋季学術講演会

回次: 74

開催地: 同志社大学

開催日: 2013/09/16 - 2013/09/20

Performance Degradation Due to Drain-Induced Barrier Lowering in Ultra-Low Supply Voltage CMOS Circuits Operating in Subthreshold Region

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