日本計算工学会論文集
Online ISSN : 1347-8826
ISSN-L : 1344-9443
改良型制約法を用いたGAによるチップマウンタシステムの多目的実装時間最適化
宮嶋 隆司中村 正行小林 光征小杉 俊
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ジャーナル フリー

2001 年 2001 巻 p. 20010039

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抄録
This paper presents an optimization method of production efficiency and the difference of the production time of each machine (line balance) about the placement time in the chip mounter system. Placement time changes greatly by the performance of the chip mounter and the configuration of the system. The problem is how to distribute parts and parts feeders to each chip mounter. We propose a distributing method using GA which makes it attain two purposes. Several numerical experiments about some systems composed of more than one chip mounter with different performance were done. It confirmed that our proposed method had usefulness more than conventional method through the results of numerical experiment. Furthermore, those characteristics and usefulness are shown about the GA adopting simple constraint method (SCM-GA) and the GA adopting improved constraint method (ICM-GA) that a constraint is changed one after another with the progress of the generation.
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© 2001 The Japan Society For Computational Engineering and Science
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