抄録
An investigation is made to analyze aCTual conneCTion strength between eleCTronic device and printed wired board (PWB) via solder paste. It is obviously important to know how many and how big void spots are generated in the solder and how severe the void affeCTs on the conneCTion strength. In this paper, to reproduce digitally the void spots is tried and to estimate the affeCTion of the void spots on struCTural strength by using an X-ray computer tomography (CT) scanner and image-based CAE software.
