抄録
This paper report a development of a high-density three dimensional packing method for small-size mechanical-electronic products. Under the progress in electronics and integration technology, packing of components into a product as smaller as possible becomes a big challenge of design automation. The method proposed in this paper represents the topology of a layout with sequence quintuple, translates it into three-dimensional arrangement by means of numerical optimization computation, and searches the optimal topology by a simulated annealing algorithm. The shape of each component can be a rectangular parallelepiped or rectilinear parallelepiped. The implemented system is applied to an example problem of a note PC for ascertaining its validity.
