OPTICALLY RECONFIGURED GATE ARRAY VLSI WITH A TRIPLE-MODULAR REDUNDANT OPTICAL CONFIGURATION CIRCUIT

抄録

The configuration procedure of field programmable gate arrays (FPGAs) is executed serially. Therefore, if only one transistor of the configuration circuit is permanently damaged by radiation, the device cannot be reconfigured. Therefore, the configuration circuit of FPGAs is weak point for radiation.

Therefore, we have been developing optically reconfigurable gate arrays (ORGAs) to realize a parallel configuration by using light. In this architecture, even if a part of programmable gate array and/or a part of the configuration circuit are broken by radiation, the rest region of the programmable gate array can be reconfigured correctly so that the total-ionizing-dose tolerance can be increased. On the other hand, integrated circuit, to decrease the frequency of soft errors happen on its configuration memory, a scrubbing technique was used. In a conventional scrubbing operation, correct configuration data is frequently written onto the configuration memory. Always, higher the scrubbing speed can increase the soft-error tolerance. In FPGAs, scrubbing speed was very slow or 100 ms. In ORGA, the parallel optical configuration architecture can realize 50 ns configuration. So, high-speed scrubbing operation could be executed.

However, in this study, we aim to achieve faster scrubbing operation than the optical scrubbing.

We have implemented a new triple-modular-redundant optical configuration circuit. The proposed method enabled a 200 ps scrubbing period. The ORGA-VLSI was fabricated.