解説
原子層堆積法による高誘電率ゲート絶縁膜の作製とその特性への基板親水性の影響
2011 年 54 巻 2 号 p. 105-109
詳細
2011 年 54 巻 2 号 p. 105-109
We examined the impact of surface chemical nature prior to atomic layer deposition (ALD) to the electrical properties of high-k gate stacks on Si substrates. We confirmed that poor electrical film quality in ALD-HfO2 fabricated on H-terminated surfaces is drastically improved by changing the surface species terminating topmost Si bonds to be hydrophilicized. Especially, the high-k gate stacks fabricated on the surfaces chemically controlled by “oxygen-termination” technique showed excellent interfacial electrical quality without creating thick interfacial SiO2 layer.
