Abstract
This paper describes progress in the development of the recently proposed CHIPS flow for hexagonal hole array patterning. The CHIPS flow provides a versatile and low-cost route for patterning of dense hexagonal hole arrays which are specifically relevant for DRAM applications. In this paper, it is demonstrated that the required pre-pattern may be printed using single exposure 193nm immersion lithography. Furthermore, strategies for definition of the array edge are proposed and results on transferring the hexagonal hole array pattern into an inorganic underlayer are described.
