MICROPATTERNING FOR ADVANCED INTERCONNECTIONS

抄録

Ultra-large integrated devices require an increase in density and number of interconnection levels. The design rules for 0.18μm technologies are 0.2μm for the holes and 0.3μm lines and spaces patterns for the metal level. DUV lithography using advanced techniques will achieve such design rules. However, DUV materials based on chemical amplification have not yet reached full maturity. In this paper, we have investigated their ability to achieve advanced interconnections for both lithography and etching.
Regarding the lithographic performance, the two main problems to be overcome are the sensitivity to both delay time and substrate type. We propose a physico chemical method based on DSC measurements to screen the materials able to be processed with minimized sensitivity to both delay and substrates.
The selected materials, positive and negative tones, as well as optimized lithographic processes have been used to investigate their etching durability.
For the etching step, the main parameters to be considered are the resist selectivity to the etched layer and the resist mask integrity during etching. When using High Density Plasma for oxide etching, the resist mask is modified, leading to striations on the sidewalls of the holes which requires optimization for 0.2μm critical dimensions. In the case of Aluminum etching, the selected DUV resist shows a reduced selectivity as well as a bad sidewall passivation by the polymers compared to I-line photoresists. This will be a limitation to the conventional metal architecture which will be accentuated with the use of copper. The invert metallization schemes are promising as they only require dielectric etching which is less sensitive to the resist process.