抄録
Printed wiring board density is increasing with progress in electronic devices. Build-up has attracted in high-density mounting. Via-hole plating is used for standard layer-to-layer connection. The process becomes complicated because the insulation layer must be planarized by filling via holes with insulation resin or conductive paste after plating.
We studied the possibility of via filling by controlling the current waveform of current and additive agents for copper electroplating. Via-filling is achieved by applying low current during plating. Current waveform control and additive agent selection were affected to via filling.
