IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
A Low Power 100-Gb/s PAM-4 Driver with Linear Distortion Compensation in 65-nm CMOS
Xiangyu MENGKangfeng WEIZhiyi YUXinlun CAI
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2023 Volume E106.C Issue 1 Pages 7-13

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Abstract

This paper proposes a low-power 100Gb/s four-level pulse amplitude modulation driver (PAM-4 Driver) based on linear distortion compensation structure for thin-film Lithium Niobate (LiNbO3) modulators, which manages to achieve high linearity in the output. The inductive peaking technology and open drain structure enable the overall circuit to achieve a 31-GHz bandwidth. With an area of 0.292 mm2, the proposed PAM-4 driver chip is designed in a 65-nm process to achieve power consumption of 37.7 mW. Post-layout simulation results show that the power efficiency is 0.37 mW/Gb/s, RLM is more than 96%, and the FOM value is 8.84.

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© 2023 The Institute of Electronics, Information and Communication Engineers
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