A 0.13mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA
Released on J-STAGE: June 01, 2024 |
Volume E107.C
Issue 6
Pages 155-162
Dongzhu LI, Zhijie ZHAN, Rei SUMIKAWA, Mototsugu HAMADA, Atsutake KOSUGE, Tadahiro KURODA
Views: 57