IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Radiation-Hardened Flip-Flops in a 65 nm Bulk Process for Terrestrial Applications Coping with Radiation Hardness and Performance Overheads
Shotaro SUGITANIRyuichi NAKAJIMAKeita YOSHIDAJun FURUTAKazutoshi KOBAYASHI
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2025 Volume E108.C Issue 2 Pages 115-126

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Abstract

Integrated circuits used in automotive or aerospace applications must have high soft error tolerance. Redundant Flip Flops (FFs) are effective to improve the soft error tolerance. However, these countermeasures have large performance overheads and can be excessive for terrestrial applications. This paper proposes two types of radiation-hardened FFs named Primary Latch Transmission gate FF (PLTGFF) and Feed-Back Gate Tri-state Inverter FF (FBTIFF) for terrestrial use. By increasing the critical charge (Qcrit) at weak nodes, soft error tolerance of them were improved with low performance overheads. PLTGFF has the 5% area, 4% delay, and 10% power overheads, while FBTIFF has the 42% area, 10% delay, and 22% power overheads. They were fabricated in a 65 nm bulk process. By α-particle and spallation neutron irradiation tests, the soft error rates are reduced by 25% for PLTGFF and 50% for FBTIFF compared to a standard FF. In the terrestrial environment, the proposed FFs have better trade-offs between reliability and performance than those of multiplexed FFs such as the dual-interlocked storage cell (DICE) with larger overheads than the proposed FFs.

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© 2025 The Institute of Electronics, Information and Communication Engineers
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