2025 Volume E108.C Issue 7 Pages 366-371
There is an increasing request for interfacing high input common mode (CM) voltages in voltage or current sense such as battery management system. This paper proposes a capacitive gain amplifier (CGA) designed to sample the differential mode (DM) voltage of signals with a CM voltage that varies from 0 to 90V. A control strategy that integrates chopping and auto zero (AZ) is used to reduce the input offset voltage. This control strategy also accelerates the CM voltage establishment of the CGA. A high-voltage switch (HV Switch) has been designed to ensure that the CM voltage of the input signal reaches 90V, while the DM voltage reaches 5V. A linear trim method is proposed to reduce gain error. The CGA has been manufactured in the DBhitek 0.18-μm CMOS process. As the Vcm varies from 0 to 90V, the circuit has an offset voltage of 3.8μV, an output noise of 71.8nV/Hz1/2 and a gain error of 0.0056%.