IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Analog Circuits and Related SoC Integration Technologies
Design of Low Power Track and Hold Circuit Based on Two Stage Structure
Takahide SATOIsamu MATSUMOTOShigetaka TAKAGINobuo FUJII
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2008 Volume E91.C Issue 6 Pages 894-902

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Abstract
This paper proposes a low power and high speed track and hold circuit (T/H circuit) based on the two-stage structure. The proposed circuit consists of two internal T/H circuits connected in cascade. The first T/H circuit converts an input signal into a step voltage and it is applied to the following second T/H circuit which drives large load capacitors and consumes large power. Applying the step voltage to the second T/H circuit prevents the second T/H circuit from charging and discharging its load capacitor during an identical track phase and enables low power operation. Thanks to the two-stage structure the proposed T/H circuit can save 29% of the power consumption compared with the conventional one. An optimum design procedure of the proposed two stage T/H circuit is explained and its validity is confirmed by HSPICE simulations.
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© 2008 The Institute of Electronics, Information and Communication Engineers
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