IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Analog Circuits and Related SoC Integration Technologies
A 60-GHz Phase-Locked Loop with Inductor-Less Wide Operation Range Prescaler in 90-nm CMOS
Hiroaki HOSHINORyoichi TACHIBANAToshiya MITOMONaoko ONOYoshiaki YOSHIHARARyuichi FUJIMOTO
著者情報
キーワード: PLL, synthesizer, VCO, ILFD, phase noise
ジャーナル 認証あり

2009 年 E92.C 巻 6 号 p. 785-791

詳細
抄録
A 60-GHz phase-locked loop (PLL) with an inductor-less prescaler is fabricated in a 90-nm CMOS process. The inductor-less prescaler has a smaller chip area than previously reported ones. The PLL operates from 61 to 63GHz and consumes 78mW from a 1.2V supply. The phase noise at 100kHz and 1MHz offset from carrier are -72 and -80dBc/Hz, respectively. The prescaler occupies 80 × 40µm2. The active area of the PLL is 0.31mm2.
著者関連情報
© 2009 The Institute of Electronics, Information and Communication Engineers
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