抄録
A 60-GHz phase-locked loop (PLL) with an inductor-less prescaler is fabricated in a 90-nm CMOS process. The inductor-less prescaler has a smaller chip area than previously reported ones. The PLL operates from 61 to 63GHz and consumes 78mW from a 1.2V supply. The phase noise at 100kHz and 1MHz offset from carrier are -72 and -80dBc/Hz, respectively. The prescaler occupies 80 × 40µm2. The active area of the PLL is 0.31mm2.